Add exercises
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42
SpinalTest/README.md
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SpinalTest/README.md
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# Prerequisites
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- [sbt](https://www.scala-sbt.org/download.html)
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- [Verilator](https://verilator.org/guide/latest/install.html)
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- A Java JDK
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More info can be found in the SpinalHDL
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[documentation](https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Getting%20Started/getting_started.html).
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On Arch Linux, everything can be installed from the package repositories:
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```
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sudo pacman -S sbt verilator jdk-openjdk
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```
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The PCs in the CS department have everything installed.
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# Test installation
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To test code generation (this should create a file called `Counter.v`):
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```
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sbt 'runMain spinaltest.Gen'
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```
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To test simulation:
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```
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sbt 'runMain spinaltest.Sim'
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```
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This should print something like the following at the end:
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```
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[info] [Progress] Simulation workspace in /.../SpinalTest/./simWorkspace/Counter
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[info] [Progress] Verilator compilation started
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[info] [Progress] Verilator compilation done in 2986.102 ms
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[info] [Progress] Start Counter test simulation with seed 267472656
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[info] counter: 9
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[info] [Done] Simulation done in 23.684 ms
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[success] Total time: 4 s, completed Oct 13, 2022, 11:00:52 AM
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```
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SpinalTest/build.sbt
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SpinalTest/build.sbt
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name := "SpinalTest"
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version := "0.1"
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scalaVersion := "2.11.12"
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val spinalVersion = "1.7.3"
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fork := true
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libraryDependencies ++= Seq(
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"com.github.spinalhdl" % "spinalhdl-core_2.11" % spinalVersion,
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"com.github.spinalhdl" % "spinalhdl-lib_2.11" % spinalVersion,
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compilerPlugin("com.github.spinalhdl" % "spinalhdl-idsl-plugin_2.11" % spinalVersion)
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)
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31
SpinalTest/src/main/scala/spinaltest/Test.scala
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31
SpinalTest/src/main/scala/spinaltest/Test.scala
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package spinaltest
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import spinal.core._
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import spinal.core.sim._
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class Counter extends Component {
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val count = out(Reg(UInt(8 bits)).init(0))
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count := count + 1
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}
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object Gen {
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def main(args: Array[String]) {
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SpinalVerilog(new Counter)
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}
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}
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object Sim {
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def main(args: Array[String]) {
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SimConfig.withWave.compile(new Counter).doSim {dut =>
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dut.clockDomain.forkStimulus(10)
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var tick = 0
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while (tick < 10) {
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dut.clockDomain.waitSampling()
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tick += 1
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}
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println(s"counter: ${dut.count.toBigInt}")
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}
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}
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}
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